This invention relates generally to methods and apparatus for data communication on a fiber channel loop. More specifically, the present invention relates to improved apparatus and methods therefor that are capable of automatically arbitrating and establishing communication control on behalf of an electronic device on a fiber channel loop.
Fiber channel loops, essentially data-carrying fiber optic channels, have in recent times become the popular communication channels for exchanging data among electronic devices, such as between a computer and its peripheral devices and/or other computers in a network. By way of example, a fiber channel loop may be employed to communicate between a host computer system and its disk drives, among the disk drives, or even to carry internet protocol (IP) data.
With reference to FIG. 1, a block diagram is shown of a host computer system 100, representing a computer which may be employed with a fiber channel loop. In general, host computer system 100 typically includes a bus 102 for communicating information among its subsystems and/or with the outside world. A host processor 104 is coupled with bus 102 for processing data and instructions. A computer readable volatile memory unit 106 (e.g. random access memory unit) may be coupled with bus 102 for temporarily storing data and instructions for host processor 104 and/or other subsystems of host computer system 100. A computer readable non-volatile memory unit 108 (e.g., read-only memory unit) may be coupled with bus 102 for storing nonvolatile data and instructions for host processor 104.
To provide high-capacity, nonvolatile storage, a computer readable data storage device 110 such as a magnetic or optical disk may also be provided. Data may be displayed to the user via a display device 112, which is coupled to bus 102 and may represent, for example, a liquid crystal device, cathode ray tube, or other display device suitable for creating graphic images and alphanumeric characters recognizable to the user. Components of host computer system 100 and its variants are well known to those skilled and will not be elaborated further here for brevity's sake.
FIG. 2 shows a block diagram of a prior art host adapter card 114 suitable for use with host computer system 100. Host adapter card 114, which may be for example coupled with bus 102 of the computer system of FIG. 1, represents the interface circuit between host computer system 100 with a fiber channel loop 117. As shown, host adapter card 114 includes a serial optical controller 116, which facilitates communication between host computer system 100 and nodes 118, 120, and 122 via fiber channel loop 117. Nodes 118, 120, and 122 include devices 124, 126, and 128 respectively.
Communication over fiber channel loop 117 is typically achieved in the serial domain, i.e., data frames are transmitted serially on the fiber channel loop. Accordingly, it is typically the case that only one node on fiber channel loop 117 may transmit at a time. However, each device at each node on fiber channel loop 117, including host computer system 100, may implement point to point communication with one other node on fiber channel loop 117 or may simultaneously broadcast to a number of other nodes on fiber channel loop 117.
To gain access to fiber channel loop 117 for transmission purposes, each device on the fiber channel loop must arbitrate for access. By way of example, serial optical controller 116 of host adapter card 114 may be employed to arbitrate on behalf of host computer system 100. To facilitate arbitration, each of host computer system 100 and nodes 118, 120, and 122 may be associated with an arbitration loop physical address (ALPA).
During arbitration, the arbitration loop physical address (ALPA) identifies the identity and priority of each device on the fiber channel loop, thereby permitting other devices to ascertain, in accordance with some predefined priority scheme, which of the multiple competing devices may win mastership of the fiber channel loop. During communication establishment, the arbitration loop physical address (ALPA) identifies the destination of each data frames. By inspecting the ALPA, a particular device on the fiber channel loop can ascertain during communication establishment whether it is the target of a particular data frame, thereby allowing it to respond appropriately.
As mentioned earlier, arbitration refers to the process wherein a device on the fiber channel loop requests mastership of the loop for transmission purpose. With reference to FIG. 2, arbitration may begin when host computer 100 instructs serial optical controller 116 to send out on the loop an ARBITRATION primitive which contains the ALPA of the host. At the same time, or even earlier in time, other nodes in the loop may have sent out similar ARBITRATION primitives of their own, which include their own ALPA's.
The ARBITRATION primitives of these other nodes are examined by serial optical controller 116 as they are received for the purpose of deciding whether these other ARBITRATION primitives have a higher priority and should therefore win mastership over the ARBITRATION primitive of serial optical controller 116 or whether they have a lower priority and should therefore yield mastership to serial optical controller 116.
By way of example, serial optical controller 116 may examine the ALPA of each ARBITRATION primitive that it receives from the loop. If the ALPA of the examined ARBITRATION primitive has a higher value than its own (i.e., lower in priority) and serial optical controller is competing for mastership of the loop at the same time, serial optical controller 116 simply does not pass on the examined ARBITRATION primitive to the next node in the loop. In this manner, the lower priority ARBITRATION primitive is discarded at serial optical controller 116.
On the other hand, if the ALPA of the examined ARBITRATION primitive has a lower value than its own (i.e., higher in priority), serial optical controller 116 may pass on the ARBITRATION primitive to the next node in the loop. Other nodes in the loop behave similarly, resulting in the ARBITRATION primitive of serial optical controller 116 being either discarded along the way by one of the nodes seeking mastership (and having a higher priority) or in the ARBITRATION primitive of serial optical controller 116 making it all the way around the loop back to serial optical controller 116. If the ARBITRATION primitive of serial optical controller 116 makes it all the way back to serial optical controller 116, host computer 100 knows that it has the highest priority among all the nodes seeking mastership, i.e., it has won arbitration.
Once host computer 100 ascertains that it has won mastership of the loop, host computer 100 and serial optical controller begins to establish communication with its target node (a disk array 124 on the node, for example) by assembling an OPEN primitive to be sent out on the loop. At this point, host computer 100 has mastership and no other nodes (except host computer 100 and its target) may transmit (since each of them knows this current state) until host computer 100 relinquishes mastership.
The OPEN primitive typically includes the identity, e.g., the ALPA, of the target node. If the ALPA is valid and if the target node can respond, the target node will acknowledge with a READY primitive in response to the OPEN primitive from serial optical controller 116. If the response, i.e., the READY primitive, is received by serial optical controller 116, the initiator (i.e., host computer 100) and the target node are now in respective OPEN and OPENED states. In these states, host computer 100 may transmit one or more data frames to the target node.
Once transmission is completed with the data frame, serial optical controller 116 may issue a CLOSE primitive to inform other nodes, including the target node, that host computer 100 has finished transmission for now and is relinquishing mastership of the loop. Serial optical controller 116 may issue the CLOSE primitive because there is no more data to be transmitted, or simply because a communication bottleneck at either host computer 100 or the target node makes it inefficient to continue hang on to mastership of the loop. In this latter case, serial optical controller may release mastership to permit the loop to be used by other nodes for transmission purposes until the communication bottleneck is resolved.
Although the prior art sequence of arbitration and subsequent communication control (i.e., communication establishment and communication termination) works adequately, there are disadvantages. For example, most prior art serial optical controller and/or host computer 100 employ software to monitor the primitives on the loop for the purpose of determining whether arbitration has been won. Software techniques, while being adaptable to work with various versions of serial optical controller 116 and being upgradable nevertheless suffers in the area of operating speed. While the software speed limitation is a relatively insignificant factor for slower communication speeds on the loop, it becomes a major problem when the transmission speed of the various nodes increases and the loop is expected to handle higher data rates.
Compounded to the problem is the serial nature of the prior art's handling of the arbitration and communication establishment sequence. In the typical case, the CPU (whether at the host computer or resident on the serial optical controller) running the software evaluates each received ARBITRATION primitive to determine whether host computer 100 has won arbitration. Once that CPU ascertains that arbitration has been won, the same CPU is then employed to assemble the OPEN primitive for transmitting to the desired target device. As can be appreciated by those in the art, a time lag invariably occurs between the receipt of the returning ARBITRATION primitive (which really indicates mastership of the loop) and the time the OPEN primitive is sent out to prepare the target device for receipt of data frames. If the data rate on the loop is fairly slow, the time lag may be tolerated without undue penalty on performance. As demand for transmission bandwidth on the loop increases (e.g., due to increasing transmission speeds of the various devices on the loop or due to an increase in the number of devices connected to the loop), this time lag becomes a major bottleneck to communication efficiency.
In view of the foregoing, there are desired improved apparatus and methods therefor that are capable of efficiently and automatically arbitrating and establishing communication control on behalf of an electronic device on a fiber channel loop.